AIM

Objective

To essentially implement and study the behavior of a 4:1 Multiplexer and a 1:4 Demultiplexer using basic logic gates (AND, OR, NOT) within an interactive virtual environment.

A multiplexer helps route multiple signals into a single output, while a demultiplexer routes a single signal into multiple outputs.

THEORY

Working Principles

4:1 Multiplexer

A multiplexer (MUX) is a combinational logic circuit that selects one of several analog or digital input signals and forwards the selected input into a single line. A 4:1 MUX has 4 data inputs (D0, D1, D2, D3), 2 select lines (S1, S0), and 1 output (Y). The select lines determine which input passes to the output. Internally, AND gates lock/unlock specific pathways.

1:4 Demultiplexer

A demultiplexer (DEMUX) operates in reverse, taking a single input data line (D) and routing it to any one of several output lines. A 1:4 demultiplexer has 1 data input, 2 select lines, and 4 possible outputs (Y0-Y3). The select lines dictate which output receives the data.

PRETEST

Assess Your Knowledge

  1. How many select lines are required for an 8:1 multiplexer?
    2
    3
    4
  2. A Demultiplexer performs the role of...
    Data Selector
    Data Distributor
    Multiplier
PROCEDURE

How to Perform the Experiment

  • Navigate to the Simulation tab.
  • Toggle the center switch to select between the MUX or DEMUX circuit.
  • In the interactive panel below the simulation, toggle the Select Lines (S0, S1) and Data Inputs (D0-D3 or D).
  • Observe the path that turns green. Green indicates an active (high/1) pathway, while Red represents inactive (low/0).
  • Hover over the logic gates to read their functional roles.
  • Click ADD READING to record your inputs and output into the observation table.
  • Once you have all combinations, click Export Lab Report.
Circuit: 4:1 MULTIPLEXER
SIMULATION ACTIVE
POSTTEST

Final Assessment

  1. If Select lines are S1=1, S0=0 in a 4:1 Mux, which input is routed to the output?
    D1
    D2
    D3
  2. Which logic gate is explicitly used to sum the outputs of the multiple conditional branches in a Multiplexer?
    AND Gate
    OR Gate
    XOR Gate
FEEDBACK

Leave Feedback

Rate your experience

☆☆☆☆☆

Did you encounter any bugs in the simulation logic? Please describe your issue.