AIM

Objective

To design and simulate an Arithmetic Logic Unit (ALU). Configure inputs and select modes to observe data routing through arithmetic and logic sub-units via the multiplexer.

THEORY

Working Principles

An Arithmetic Logic Unit (ALU) is the part of a computer processor (CPU) that carries out arithmetic and logic operations on the operands in computer instruction words. The ALU is divided into an Arithmetic Unit and a Logic Unit, with a multiplexer selecting between their outputs based on a Mode line.

PRETEST

Assess Your Knowledge

  1. What does ALU stand for?
    Arithmetic Logic Unit
    Asymmetric Logic Unit
  2. Which component selects between the Arithmetic and Logic outputs?
    Decoder
    Multiplexer
PROCEDURE

How to Perform the Experiment

  • Navigate to the Simulation tab.
  • Toggle the Mode (M) switch to select between Arithmetic (M=0) and Logic (M=1) operations.
  • Toggle the Select Lines (S) to pick a specific operation.
  • Set the Input A and Input B values and observe how the output Y changes.
  • Observe the active paths lighting up in the macro architecture diagram.
ALU MACRO ARCHITECTURE
SIMULATION ACTIVE
Arithmetic Unit Logic Unit 2:1 MUX A [3:0] B [3:0] S [3:0] Mode (M) Y [3:0]
Input A
A3
A2
A1
A0
Input B
B3
B2
B1
B0
Select S
S3
S2
S1
S0
Mode
M
Output Y
Y3
0
Y2
0
Y1
0
Y0
0
POSTTEST

Final Assessment

  1. If M=0, what unit is active?
    Logic Unit
    Arithmetic Unit
REFERENCES

Further Reading

  • Computer Organization and Design by David A. Patterson and John L. Hennessy
  • Digital Design by M. Morris Mano
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